在主機的測試環境的搭建好之後，需要調整Android系統源碼，否則將達不到測試的目錄，完成之後需要關閉部分對應的調整。
1、preloader部分的調整
1）修改vendor\mediatek\proprietary\bootable\bootloader\preloader\custom\evb3561sv_w_no2\evb3561sv_w_no2.mk
添加DDR壓力測試的編譯開關到當前的項目中
MTK_EMMC_SUPPORT_OTP=no
ATC_BOOTTIME_OPTIMIZATION=yes
ATC_DRR_STREE_TEST=yes
MTK_COMBO_NAND_SUPPORT=no
2）修改vendor\mediatek\proprietary\bootable\bootloader\preloader\platform\mt3561\feature.mak
添加針對公共代碼是否將壓力測試添加的部分編譯進入系統
ifeq ("$(MTK_EMMC_SUPPORT_OTP)","yes")
C_OPTION += -DMTK_EMMC_SUPPORT_OTP
endif
ifneq ("$(ATC_BOOTTIME_OPTIMIZATION)","yes")
C_OPTION += -DFLYAUDIO_BOOTTIME_OPTIMIZATION
endif
ifeq ("$(ATC_DRR_STREE_TEST)","yes")
C_OPTION += -DATC_DRR_STREE_TEST_SUPPORT
endif
ifeq ("$(MTK_COMBO_NAND_SUPPORT)","yes")
C_OPTION += -DMTK_COMBO_NAND_SUPPORT
endif
3）修改vendor\mediatek\proprietary\bootable\bootloader\preloader\platform\mt3561\src\drivers\inc\dramc2.h，打開ETT壓力測試開關。
//#define H9TQ64A8GTMCUR_KUM
//#define KMQ8X000SA_B414
//#define KMQ7X000SA_B315
//#define VmFix_VcHV
//#define VmFix_VcNV
//#define VmFix_VcLV
//#define CUSTOM_CONFIG_MAX_DRAM_SIZE 0x3F000000
//#define ENABLE_SYNC_MASK
#ifdef ATC_DRR_STREE_TEST_SUPPORT
#define pmic_HQA_TCs
#endif
//#define WAVEFORM_MEASURE
//#define DRAM_INIT_CYCLES
//#define MAX_DRAM_DRIVING
//#define MAX_DRAMC_DRIVING
// End of Compile Option
4）修改vendor\mediatek\proprietary\bootable\bootloader\preloader\platform\mt3561\src\drivers\emi.c
修改pmic_HQA_voltage_adjust 函數中的對應HV/LV /NV的 MT6328_VCORE1_CON11/MT6328_SLDO_ANA_CON1。以LTHV測試項爲例，即把LTHV 的ETT log中所設置的0x65,0xD （該數值僅爲舉例說明，以貴司實際讀到的數值爲準） 數值寫入pmic_HQA_Voltage_adjust函數中HVcHVm 的case 中. 而我們ETT針對HV、LV、NV分別測試跑出來的log信息如下：
HV(高溫60度):
G : Start the ETT test. Delay 40s
D : Disable Delay 40s before start ETT...
P : Print voltage settings
V : Voltage adjustment.
Please enter selection:v
.
Vmem (HV, NV, LV)=(1.30, 1.22, 1.16)
Vcore(HV, NV, LV)=(1.23, 1.15, 1.07)
1 : (Vmem HV:1.30, Vcore HV:1.230)
2 : (Vmem NV:1.22, Vcore NV:1.15)
3 : (Vmem LV:1.16, Vcore LV:1.07)
4 : (Vmem LV:1.16, Vcore HV:1.230)
5 : (Vmem HV:1.30, Vcore LV:1.07)
6 : (Vmem NV:1.22, Vcore HV:1.230)
7 : (Vmem NV:1.22, Vcore LV:1.07)
8 : (Vcore ) ++ ...
9 : (Vcore ) -- ...
Please enter pattern selection:(1-7)1
(Vmem HV, Vcore HV) had been set...
[PMIC]pmic_voltage_read :
[Vcore] MT6328_VCORE1_CON11=0x65,
[Vmem] MT6328_SLDO_ANA_CON0/1=0x0 0xD
LV(低溫-30度):
ETT
G : Start the ETT test. Delay 40s
D : Disable Delay 40s before start ETT...
P : Print voltage settings
V : Voltage adjustment.
Please enter selection:v
.
Vmem (HV, NV, LV)=(1.30, 1.22, 1.16)
Vcore(HV, NV, LV)=(1.23, 1.15, 1.07)
1 : (Vmem HV:1.30, Vcore HV:1.230)
2 : (Vmem NV:1.22, Vcore NV:1.15)
3 : (Vmem LV:1.16, Vcore LV:1.07)
4 : (Vmem LV:1.16, Vcore HV:1.230)
5 : (Vmem HV:1.30, Vcore LV:1.07)
6 : (Vmem NV:1.22, Vcore HV:1.230)
7 : (Vmem NV:1.22, Vcore LV:1.07)
8 : (Vcore ) ++ ...
9 : (Vcore ) -- ...
Please enter pattern selection:(1-7)3
(Vmem LV, Vcore LV) had been set...
[PMIC]pmic_voltage_read :
[Vcore] MT6328_VCORE1_CON11=0x4B,
[Vmem] MT6328_SLDO_ANA_CON0/1=0x0 0x4
NV(正常25度):
G : Start the ETT test. Delay 40s
D : Disable Delay 40s before start ETT...
P : Print voltage settings
V : Voltage adjustment.
Please enter selection:v
.
Vmem (HV, NV, LV)=(1.30, 1.22, 1.16)
Vcore(HV, NV, LV)=(1.23, 1.15, 1.07)
1 : (Vmem HV:1.30, Vcore HV:1.230)
2 : (Vmem NV:1.22, Vcore NV:1.15)
3 : (Vmem LV:1.16, Vcore LV:1.07)
4 : (Vmem LV:1.16, Vcore HV:1.230)
5 : (Vmem HV:1.30, Vcore LV:1.07)
6 : (Vmem NV:1.22, Vcore HV:1.230)
7 : (Vmem NV:1.22, Vcore LV:1.07)
8 : (Vcore ) ++ ...
9 : (Vcore ) -- ...
Please enter pattern selection:(1-7)2
(Vmem NV, Vcore NV) had been set...
[PMIC]pmic_voltage_read :
[Vcore] MT6328_VCORE1_CON11=0x58,
[Vmem] MT6328_SLDO_ANA_CON0/1=0x0 0x1
從以上信息可以知道，我們代碼vendor\mediatek\proprietary\bootable\bootloader\preloader\platform\mt3561\src\drivers\emi.c中的pmic_HQA_Voltage_adjust函數中HVcHVm 的case中的代碼已經包含了相應的設置，所以不需要修改，如下：
void pmic_HQA_Voltage_adjust(int nAdjust)
{
switch (nAdjust) {
case 0: //HVcHVm //HV(高溫60度，並且我們的MACH_TYPE是MT3561s)
//pmic_config_interface(MT6328_VCORE1_CON11, 0x6B, 0x7F, 0); // 1.265V
#if defined(MACH_TYPE_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x71, 0x7F, 0); // 1.310V
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x65, 0x7F, 0); // 1.230V
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x0D, 0xF, 8); // +0.6V (1.3V)
printf("========== HVcHVm ==========\r\n");
break;
case 1: //HVcLVm
//pmic_config_interface(MT6328_VCORE1_CON11, 0x6B, 0x7F, 0); // 1.265V
#if defined(MACH_TYPE_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x71, 0x7F, 0); // 1.310V
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x04, 0xF, 8); // -0.8V (1.16V)
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x65, 0x7F, 0); // 1.230V
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x05, 0xF, 8); // -1.0V (1.14V)
#endif
printf("========== HVcLVm ==========\r\n");
break;
case 2: //LVcHVm //LV(低溫-30度)
//pmic_config_interface(MT6328_VCORE1_CON11, 0x46, 0x7F, 0); // 1.035V
#if defined(MACH_TYPE_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x54, 0x7F, 0); // 1.125V
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x4B, 0x7F, 0); // 1.070V
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x0D, 0xF, 8); // +0.6V (1.3V)
printf("========== LVcHVm ==========\r\n");
break;
case 3: //LVcLVm
//pmic_config_interface(MT6328_VCORE1_CON11, 0x46, 0x7F, 0); // 1.035V
#if defined(MACH_TYPE_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x54, 0x7F, 0); // 1.125V
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x04, 0xF, 8); // -0.8V (1.16V)
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x4B, 0x7F, 0); // 1.070V
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x05, 0xF, 8); // -1.0V (1.14V)
#endif
printf("========== LVcLVm ==========\r\n");
break;
case 4: //NV (正常25度)
#if defined(MACH_TYPE_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x68, 0x7F, 0); // 1.25V
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x58, 0x7F, 0); // 1.15V
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x01, 0xF, 8); // -0.2V (1.22V)
printf("========== NV ==========\r\n");
break;
default: //NV
#if defined(MACH_TYPE_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x68, 0x7F, 0); // 1.25V
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x58, 0x7F, 0); // 1.15V
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x01, 0xF, 8); // -0.2V (1.22V)
printf("========== NV ==========\r\n");
break;
}
}
5、vendor\mediatek\proprietary\bootable\bootloader\preloader\platform\mt3561\src\drivers\platform.c
這個文件中, 在platform_pre_init 函數中，添加如下紅色的code。所添加的pmic_HQA_Voltage_adjust函數，其參數0 ， 3， 4分別代表了HV,LV,NV，開啓不同的參數代表不同的測試項（即LTHV/HTLV/NTNV)。同時添加頭文件。
#include "ncp1854.h"
#ifdef ATC_DRR_STREE_TEST_SUPPORT
#include "dramc.h"
#endif
........................
void platform_pre_init(void)
{
.........................................
check_charger_boost_status();
#if !CFG_FPGA_PLATFORM
pmic_ret = pmic_init();
#ifdef ATC_DRR_STREE_TEST_SUPPORT
//adde for stress test start
pmic_force_PWM_Mode();
//HVcore HVmem
//pmic_HQA_Voltage_adjust(0); //HV測試時打開此處
//LVcore LVmem
//pmic_HQA_Voltage_adjust(3); //LV測試時打開此處
//NVcore NVmem
pmic_HQA_Voltage_adjust(4); //NV測試時打開此處
//adde for stress test end
#endif
mt_pll_post_init();
//mt_arm_pll_sel();
#ifdef FLYAUDIO_BOOTTIME_OPTIMIZATION
BOOTING_TIME_PROFILING_LOG("PMIC");
#endif
#endif
//enable long press reboot function
PMIC_enable_long_press_reboot();
.......................
}
.................................................
2、kernel內核代碼調整部分
在進行代碼調整之前，首先添加DDR壓力測試的開關，在測試完成之後關閉開關，將關閉所有測試代碼的調整
1）添加內核DDR壓力測試的代碼調整開關
在
kernel-3.18\arch\arm64\configs\evb3561sv_w_no2_debug_defconfig
kernel-3.18\arch\arm64\configs\evb3561sv_w_no2_defconfig
中添加
CONFIG_CROSS_COMPILE="aarch64-linux-android-"
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_ATC_DDR_STREE_TEST=y //添加開關
在kernel-3.18\drivers\misc\mediatek\power\Kconfig文件中添加配置
# Power Related
config MTK_PMIC
bool "MediaTek PMIC driver"
default y
---help---
MediaTek PMIC driver
config ATC_DDR_STREE_TEST //添加DDR壓力測試開關的內核配置
bool "DDR STREE TEST"
---help---
MediaTek DDR STREE TEST
2、在kernel-3.18\drivers\misc\mediatek\base\power\mt3561\mt_vcore_dvfs_2.c的init_vcorefs_pwrctrl函數中，分別把高檔寫到OPPI_PERF_ULTRA， OPPI_PERF，把低檔寫到OPPI_LOW_PWR； if ( i == OPPI_LOW_PWR )語句需要手動添加
– DVS : 0x65（高檔） <-> 0x54（低檔） (HV)
– DVS : 0x58 （高檔） <-> 0x48 （低檔） (NV)
– DVS : 0x4B （高檔） <-> 0x3C （低檔） (LV)
2.1）首先添加針對HV、NV、LV的測試開關，在測試其中任何一項時打開這個開關即可，如下：
#include "mt_vcore_dvfs.h"
#include "mt_cpufreq.h"
#include "mt_spm.h"
#include "mt_ptp.h"
#if defined(CONFIG_ATC_DDR_STREE_TEST)
#define HVcore_TEST 0 //HV test
#define LVcore_TEST 0 //LV test
#define NVcore_TEST 1 //NV test
#endif
2.2）在init_vcorefs_pwrctrl(void)函數中添加HV、NV、LV測試代碼
/**************************************
* Init Function
**************************************/
static int init_vcorefs_pwrctrl(void)
{
int i;
struct vcorefs_profile *pwrctrl = &vcorefs_ctrl;
struct opp_profile *opp_ctrl_table = opp_table;
mutex_lock(&vcorefs_mutex);
pwrctrl->curr_vcore_uv = get_vcore_uv();
BUG_ON(pwrctrl->curr_vcore_uv == 0);
pwrctrl->curr_ddr_khz = get_ddr_khz();
vcorefs_crit("curr_vcore_uv: %u, curr_ddr_khz: %u\n", pwrctrl->curr_vcore_uv, pwrctrl->curr_ddr_khz);
#if defined(CONFIG_ATC_DDR_STREE_TEST) //壓力測試
//adde for stress test start
//HVcore HVmem
#if HVcore_TEST
for (i = 0; i < NUM_OPP; i++) {
if (i == OPPI_PERF_ULTRA) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x65);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_PERF) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x65);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_LOW_PWR) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x54);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(1);
}
#endif
//LVcore LVmem
#if LVcore_TEST
for (i = 0; i < NUM_OPP; i++) {
if (i == OPPI_PERF_ULTRA) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x58);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_PERF) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x58);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_LOW_PWR) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x48);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(1);
}
#endif
//NVcore NVmem
#if NVcore_TEST
for (i = 0; i < NUM_OPP; i++) {
if (i == OPPI_PERF_ULTRA) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x4B);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_PERF) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x48);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_LOW_PWR) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(0x3c);
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(1);
}
#endif
#else //否則系統正常啓動
for (i = 0; i < NUM_OPP; i++) {
if (i == OPPI_PERF_ULTRA) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(get_vcore_ptp_volt(VCORE_1_P_25_UV));
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_PERF) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(get_vcore_ptp_volt(VCORE_1_P_15_UV));
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(0);
} else if (i == OPPI_LOW_PWR) {
opp_ctrl_table[i].vcore_uv = vcore_pmic_to_uv(get_vcore_ptp_volt(VCORE_1_P_05_UV));
opp_ctrl_table[i].ddr_khz = get_ddr_khz_by_steps(1);
}
#endif
vcorefs_crit("OPP %d: vcore_uv = %u, ddr_khz = %u\n",
i, opp_ctrl_table[i].vcore_uv, opp_ctrl_table[i].ddr_khz);
}
update_vcore_pwrap_cmd(opp_ctrl_table);
mutex_unlock(&vcorefs_mutex);
return 0;
}
3、kernel-3.18\drivers\misc\mediatek\dramc\mt3561\mt_dramc.c
參考preloader調整中的4)部分ETT針對高中低溫測試的log信息，修改pmic_HQA_voltage_adjust 函數中的對應HV/LV /NV的
MT6328_VCORE1_CON11/ MT6328_VCORE1_CON12/ MT6328_SLDO_ANA_CON1。
以LTHV測試項爲例，即把LTHV 的ETT log中所設置的0x71, 0xD數值（該數值僅爲舉例說明，以貴司實際讀到的數值爲準）寫入pmic_HQA_Voltage_adjust函數中HVcHVm 的case 中
void pmic_HQA_Voltage_adjust(int nAdjust)
{
switch (nAdjust) {
case 0: /*HVcHVm*/ //HV高溫測試
/*pmic_config_interface(MT6328_VCORE1_CON11, 0x6B, 0x7F, 0);*/ /* 1.265V */
#if defined(CONFIG_ARCH_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x71, 0x7F, 0); /* 1.310V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x71, 0x7F, 0); /* 1.310V */
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x65, 0x7F, 0); /* 1.230V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x65, 0x7F, 0); /* 1.230V */
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x0D, 0xF, 8); /* +0.06V (1.3V) */
pr_warn("========== HVcHVm ==========\r\n");
break;
case 1: /*HVcLVm*/
/*pmic_config_interface(MT6328_VCORE1_CON11, 0x6B, 0x7F, 0);*/ /* 1.265V */
#if defined(CONFIG_ARCH_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x71, 0x7F, 0); /* 1.310V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x71, 0x7F, 0); /* 1.310V */
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x04, 0xF, 8); /* -0.08V (1.16V) */
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x65, 0x7F, 0); /* 1.230V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x65, 0x7F, 0); /* 1.230V */
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x05, 0xF, 8); /* -1.00V (1.14V) */
#endif
pr_warn("========== HVcLVm ==========\r\n");
break;
case 2: /*LVcHVm*/ //LV低溫測試
/*pmic_config_interface(MT6328_VCORE1_CON11, 0x46, 0x7F, 0);*/ /* 1.035V */
#if defined(CONFIG_ARCH_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x54, 0x7F, 0); /* 1.125V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x54, 0x7F, 0); /* 1.125V */
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x4B, 0x7F, 0); /* 1.070V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x4B, 0x7F, 0); /* 1.070V */
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x0D, 0xF, 8); /* +0.06V (1.3V) */
pr_warn("========== LVcHVm ==========\r\n");
break;
case 3: /*LVcLVm*/
/*pmic_config_interface(MT6328_VCORE1_CON11, 0x46, 0x7F, 0);*/ /* 1.035V */
#if defined(CONFIG_ARCH_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x54, 0x7F, 0); /* 1.125V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x54, 0x7F, 0); /* 1.125V */
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x04, 0xF, 8); /* -0.08V (1.16V)*/
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x4B, 0x7F, 0); /* 1.070V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x4B, 0x7F, 0); /* 1.070V */
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x05, 0xF, 8); /* -1.00V (1.14V) */
#endif
pr_warn("========== LVcLVm ==========\r\n");
break;
case 4: /*NV*/ //NV正常溫度測試
#if defined(CONFIG_ARCH_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x68, 0x7F, 0); /* 1.25V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x68, 0x7F, 0); /* 1.25V */
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x58, 0x7F, 0); /* 1.15V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x58, 0x7F, 0); /* 1.15V */
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x01, 0xF, 8); /* -0.02V (1.22V) */
pr_warn("========== NV ==========\r\n");
break;
default: /*NV*/
#if defined(CONFIG_ARCH_MT3562)
pmic_config_interface(MT6328_VCORE1_CON11, 0x68, 0x7F, 0); /* 1.25V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x68, 0x7F, 0); /* 1.25V */
#else
pmic_config_interface(MT6328_VCORE1_CON11, 0x58, 0x7F, 0); /* 1.15V */
pmic_config_interface(MT6328_VCORE1_CON12, 0x58, 0x7F, 0); /* 1.15V */
#endif
pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x01, 0xF, 8); /* -0.02V (1.22V) */
pr_warn("========== NV ==========\r\n");
break;
}
}
#if defined(CONFIG_ATC_DDR_STREE_TEST)
EXPORT_SYMBOL_GPL(pmic_HQA_Voltage_adjust); //添加函數導出，後面要用，否則編譯會報錯誤
#endif
4、kernel-3.18\drivers\misc\mediatek\power\mt3561\pmic.c
在kernel-3.18\drivers\misc\mediatek\power\mt3561\pmic.c文件中添加#include "mt_dramc.h" 這個MACRO,如下：
#include <mt-plat/aee.h>
#if defined(CONFIG_ATC_DDR_STREE_TEST)
#include "mt_dramc.h" //添加宏
#endif
#include "mt_devinfo.h"
在pmic_mt_probe 函數中,添加如下橙色方框中的code. 所添加的pmic_HQA_Voltage_adjust函數，其參數0 ， 3， 4分別代表了HV,LV,NV，開啓不同的參數代表不同的測試項（即LTHV/HTLV/NTNV)。
在kernel-3.18\drivers\misc\mediatek\power\mt3561\pmic.c文件的
static int pmic_mt_probe(struct platform_device *dev)函數中添加：
static int pmic_mt_probe(struct platform_device *dev)
{
int ret_device_file = 0, i;
#ifdef DLPT_FEATURE_SUPPORT
const int *pimix;
int len = 0;
#endif
#if defined(CONFIG_MTK_SMART_BATTERY)
struct device_node *np;
u32 val;
/* check customer setting */
np = of_find_compatible_node(NULL, NULL, "mediatek,bat_meter");
if (np == NULL)
PMICLOG("[PMIC]pmic_mt_probe get bat_meter node failed\n");
if (of_property_read_u32(np, "car_tune_value", &val) == 0) {
batt_meter_cust_data.car_tune_value = (int)val;
PMICLOG("Get car_tune_value from DT: %d\n", batt_meter_cust_data.car_tune_value);
} else {
batt_meter_cust_data.car_tune_value = CAR_TUNE_VALUE;
PMICLOG("Get car_tune_value from cust header\n");
}
#endif
/*--- initailize pmic_suspend_state ---*/
pmic_suspend_state = false;
#ifdef DLPT_FEATURE_SUPPORT
pimix = NULL;
if (of_scan_flat_dt(fb_early_init_dt_get_chosen, NULL) > 0)
pimix = of_get_flat_dt_prop(pmic_node, "atag,imix_r", &len);
if (pimix == NULL) {
pr_err(" pimix==NULL len=%d\n", len);
} else {
pr_err(" pimix=%d\n", *pimix);
ptim_rac_val_avg = *pimix;
}
PMICLOG("******** MT pmic driver probe!! ********%d\n", ptim_rac_val_avg);
pr_debug("[PMIC]pmic_mt_probe %s %s\n", dev->name, dev->id_entry->name);
#endif /* #ifdef DLPT_FEATURE_SUPPORT */
/*get PMIC CID */
pr_debug
("PMIC CID=0x%x PowerGoodStatus = 0x%x OCStatus = 0x%x ThermalStatus = 0x%x rsvStatus = 0x%x\n",
pmic_get_register_value(PMIC_SWCID), upmu_get_reg_value(0x21c),
upmu_get_reg_value(0x214), upmu_get_reg_value(0x21e), upmu_get_reg_value(0x2a6));
upmu_set_reg_value(0x2a6, 0xff);
#if defined(CONFIG_ARCH_MT3562)
PMICLOG("[PMIC_INIT_SETTING_V1] delay to MT6311 init\n");
#else
PMIC_INIT_SETTING_V1();
PMICLOG("[PMIC_INIT_SETTING_V1] Done\n");
#if defined(CONFIG_ATC_DDR_STREE_TEST) //壓力測試開始
//adde for stress test start
//HVcore HVmem
//pmic_HQA_Voltage_adjust(0); //HV測試時打開
//LVcore LVmem
//pmic_HQA_Voltage_adjust(3); //LV測試時打開
//NVcore NVmem
pmic_HQA_Voltage_adjust(4); //NV測試時打開
pmic_voltage_read(0);
//adde for stress test end
#endif
#endif
#if !defined CONFIG_MTK_LEGACY
/* replace by DTS*/
#else
PMIC_CUSTOM_SETTING_V1();
PMICLOG("[PMIC_CUSTOM_SETTING_V1] Done\n");
#endif /*End of #if !defined CONFIG_MTK_LEGACY */
/*#if defined(CONFIG_MTK_FPGA)*/
#if 0
PMICLOG("[PMIC_EINT_SETTING] disable when CONFIG_MTK_FPGA\n");
#else
/*PMIC Interrupt Service */
PMIC_EINT_SETTING();
PMICLOG("[PMIC_EINT_SETTING] Done\n");
..................................
............................
}
5）在kernel-3.18\drivers\misc\mediatek\power\Makefile文件中添加
kernel-3.18\drivers\misc\mediatek\dramc\mt3561\mt_dramc.h頭文件路徑，否則編譯會提示kernel-3.18\drivers\misc\mediatek\power\mt3561\pmic.c文件時找不到mt_dramc.h這個頭文件，如下：
obj-y += $(subst ",,$(CONFIG_MTK_PLATFORM))/
###添加CONFIG_ATC_DDR_STREE_TEST壓力測試的開關項，保證在不打開壓力測試時將不被編譯進來
subdir-ccflags-$(CONFIG_ATC_DDR_STREE_TEST) += -I$(srctree)/drivers/misc/mediatek/dramc/mt3561/
##subdir-ccflags-y += -I$(srctree)/drivers/misc/mediatek/dramc/mt3561/
6）如果kernel-3.18\drivers\misc\mediatek\dramc\mt3561\mt_dramc.h文件中的
#define VCORE1_ADJ_TEST
這個沒有打開的話，需要打開這個開關。我們代碼默認已經打開，不需要再修改。
3、編譯preloader和內核、bootimage，然後下載preloader.bin和bootimage.img即可測試
在源碼的頂層目錄中執行：
AndroidM_3561_after$ source build/envsetup.sh
AndroidM_3561_after$ lunch full_evb3561sv_w_no2-userdebug
AndroidM_3561_after$ make -j24 pl && make -j24 kernel && make -j24 bootimage
注意：在分別測試HV、LV、NV的時候，打開以下三個文件對應的開關
kernel-3.18\drivers\misc\mediatek\power\mt3561\pmic.c
kernel-3.18\drivers\misc\mediatek\base\power\mt3561\mt_vcore_dvfs_2.c
vendor\mediatek\proprietary\bootable\bootloader\preloader\platform\mt3561\src\drivers\platform.c
編譯對應的preloader.bin和bootimage.img文件，分別下載進行測試，具體測試的方法再下一篇文檔中說明。