ngapp_build20190320放出後，陸續收到反饋：app總是報錯，不容易找到valid configuraiton能讓工具順利導出excel。
爲方便調試驗證，新增下列feature：
（1） 如果options/enable debug勾選，不會再執行excel導出操作，即使configuration是正確的。如果需要導出excel，請去勾選options/enable debug。
（2）針對工具中存在的四處隨機操作，新增‘advanced settings' tab用於指定對應參數配置：
這四處隨機操作分別是：
（1）recvSSB之後偵聽SIB1調度PDCCH occasion時：
*bestSsb爲隨機選取
*與bestSsb對應的PDCCH slot爲隨機選取
*與bestSSB對應的PDCCH slot的PDCCH candidate爲隨機選取
（2）PRACH發送過程中：
*與bestSsb對應的PRACH occasion爲隨機選取
（3）偵聽Msg2調度的PDCCH occasion時：
*pdcch occasion爲隨機選取；
*與pdcch occasion對應的pdcch candidate爲隨機選取
'advanced settings'中與上述對應的6個配置參數，用於直接指定相應的配置值。對於invalid configuration，可以通過’advanced settings‘配置來逐步調整爲valid configuration。
（3）舉例如下：
n41，100M，all scs=30k，ul/dl configuration is align to LTE sa2+ssp7(3:1+10:2:2) with 3ms offset.
Invalid configuration example:
[5GNR SIM]Prepare configurations
-->inside prepNrGrid
contents of ["freqBand"]: {'opBand': 'n41', 'duplexMode': 'TDD', 'maxDlFreq': 2690, 'freqRange': 'FR1'}
contents of ["ssbGrid"]: {'scs': '30KHz', 'pattern': 'Case C', 'minGuardBand240k': 'NA', 'kSsb': '0', 'nCrbSsb': '38'}
contents of ["ssbBurst"]: {'maxL': 8, 'inOneGroup': '11111111', 'groupPresence': 'NA', 'period': '20ms'}
contents of ["mib"]: {'sfn': '0', 'hrf': '0', 'dmrsTypeAPos': 'pos2', 'commonScs': '30KHz', 'rmsiCoreset0': '12', 'rmsiCss0': '0', 'coreset0MultiplexingPat': 1, 'coreset0NumRbs': 48, 'coreset0NumSymbs': 1, 'coreset0OffsetList': (16,), 'coreset0Offset': 16, 'coreset0StartRb': 0}
contents of ["carrierGrid"]: {'scs': '30KHz', 'bw': '100MHz', 'numRbs': '273', 'minGuardBand': '3'}
contents of ["pci"]: 0
contents of ["numUeAp"]: 4Tx
contents of ["tddCfg"]: {'refScs': '30KHz', 'pat1Period': '5ms', 'pat1NumDlSlots': '7', 'pat1NumDlSymbs': '6', 'pat1NumUlSymbs': '4', 'pat1NumUlSlots': '2', 'pat2Period': 'not used', 'pat2NumDlSlots': '', 'pat2NumDlSymbs': '', 'pat2NumUlSymbs': '', 'pat2NumUlSlots': ''}
contents of ["css0"]: {'aggLevel': '4', 'numCandidates': 'n4'}
contents of ["dci10Sib1"]: {'rnti': '0xFFFF', 'muPdcch': '1', 'muPdsch': '1', 'tdRa': '2', 'tdMappingType': 'Type A', 'tdK0': '0', 'tdSliv': '95', 'tdStartSymb': '2', 'tdNumSymbs': '9', 'fdRaType': 'RA Type1', 'fdRa': '00001011111', 'fdStartRb': '0', 'fdNumRbs': '48', 'fdVrbPrbMappingType': 'interleaved', 'fdBundleSize': 'n2', 'mcsCw0': '1', 'tbs': '1480'}
contents of ["dci10Msg2"]: {'rnti': '0x0001', 'muPdcch': '1', 'muPdsch': '1', 'tdRa': '3', 'tdMappingType': 'Type A', 'tdK0': '0', 'tdSliv': '86', 'tdStartSymb': '2', 'tdNumSymbs': '7', 'fdRaType': 'RA Type1', 'fdRa': '00001011111', 'fdStartRb': '0', 'fdNumRbs': '48', 'fdVrbPrbMappingType': 'interleaved', 'fdBundleSize': 'n2', 'mcsCw0': '1', 'tbScaling': '0', 'tbs': '1192'}
contents of ["dmrsSib1"]: {'dmrsType': 'Type 1', 'dmrsAddPos': 'pos2', 'maxLength': 'len1', 'dmrsPorts': '0', 'cdmGroupsWoData': '2', 'numFrontLoadSymbs': '1', 'tdL': [2, 6, 9], 'fdK': [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]}
contents of ["dmrsMsg2"]: {'dmrsType': 'Type 1', 'dmrsAddPos': 'pos2', 'maxLength': 'len1', 'dmrsPorts': '0', 'cdmGroupsWoData': '2', 'numFrontLoadSymbs': '1', 'tdL': [2, 7], 'fdK': [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]}
contents of ["iniUlBwp"]: {'bwpId': '0', 'scs': '30KHz', 'cp': 'normal', 'locAndBw': '1099', 'startRb': '0', 'numRbs': '273'}
contents of ["rach"]: {'prachConfId': '98', 'raFormat': 'A2', 'raX': 2, 'raY': (1,), 'raSubfNumFr1SlotNumFr2': (9,), 'raStartingSymb': 0, 'raNumSlotsPerSubfFr1Per60KSlotFr2': 1, 'raNumOccasionsPerSlot': 3, 'raDuration': 4, 'scs': '30KHz', 'msg1Fdm': '1', 'msg1FreqStart': '0', 'raRespWin': 'sl20', 'totNumPreambs': '64', 'ssbPerRachOccasion': 'one', 'cbPreambsPerSsb': '4', 'msg3Tp': 'disabled', 'raLen': 139, 'raNumRbs': 12, 'raKBar': 2}
contents of ["advanced"]: {'bestSsb': 'NA', 'sib1PdcchSlot': 'NA', 'sib1PdcchCand': 'NA', 'prachOccasion': 'NA', 'msg2PdcchSlot': 'NA', 'msg2PdcchCand': 'NA'}
第一次執行（注意勾選enable debug）報錯：即SIB1與SSB重疊。
tdOverlapped = {32~39, 44~49}；而symbol32~39對應issb=2，symbol 44~49對應issb=3 （注意baseScsTd=60k, ssbScs=30k,所以scaleTd=2；tdOverlapped以及ssbFirstSymb都是以baseScsTd定義的）
sib1時域調度爲sfn=0,slot=1,startSymb=2,numSymbs=9
從下面圖示可以看出，sib1與ssb時域重疊情況。
爲避開ssb，可以將sib1時域調度信息配置爲：sfn=0,slot=1,startSymb=12,numSymbs=2
part of debug output:
[5GNR SIM]recv SSB
---->inside recvSsb(hsfn=0,sfn=0, scaleFd=2, scaleTd=2)
issb=0, ssbFirstSc=456, v=0, ssbFirstSymb=4
issb=1, ssbFirstSc=456, v=0, ssbFirstSymb=16
issb=2, ssbFirstSc=456, v=0, ssbFirstSymb=32
issb=3, ssbFirstSc=456, v=0, ssbFirstSymb=44
issb=4, ssbFirstSc=456, v=0, ssbFirstSymb=60
issb=5, ssbFirstSc=456, v=0, ssbFirstSymb=72
issb=6, ssbFirstSc=456, v=0, ssbFirstSymb=88
issb=7, ssbFirstSc=456, v=0, ssbFirstSymb=100
selecting pdcch candidate: bestSsb=0(hrf=0,issb=0), pdcchSlot=1, pdcchCandidate=0
[5GNR SIM]recv SIB1
---->inside recvSib1(hsfn=0,sfn=0,dci slot=1)
contents of sib1DmrsSymbs(w.r.t to slivS): [0, 4, 7]
[2019-03-26 14:15:44]Error: When receiving the PDSCH scheduled with SI-RNTI and the system information indicator in DCI is set to 0, the UE shall assume that no SS/PBCH block is transmitted in REs used by the UE for a reception of the PDSCH. tdOverlapped={32, 33, 34, 35, 36, 37, 38, 39, 44, 45, 46, 47, 48, 49} fdOverlapped={456, 457, 458, 459, 460, 461, 462, 463, 464, 465, 466, 467, 468, 469, 470, 471, 472, 473, 474, 475, 476, 477, 478, 479, 480,....(omitted)
爲了實現在上述配置的基礎之上，規避上述ssb/sib1重疊錯誤，可以在'advanced settings'配置：
並將DCI 1_0(SIB1)時域調度從2調整爲10：
再次執行時，又提示msg2與ssb衝突：
tdOverlapped={4~11, 16~17}，其中symbol4~11對應issb=0，symbol 16~17對應issb=1
Msg2時域調度信息爲：sfn=2,slot=0,startSymb=2,numSymbs=7
同理如果將Msg2時域調度從3調整爲10也可以解決衝突：此時startSymb=12，numSymbs=2。
part of debug output:
[5GNR SIM]recv PDCCH(DCI 1_0, SI-RNTI)
selecting pdcch candidate: bestSsb=0(hrf=0,issb=0), pdcchSlot=1, pdcchCandidate=0
[5GNR SIM]recv SIB1
contents of ssb2RachOccasionMap:
issb=0: rachOccasion=[[[0, 1, 19], 0, 0]], cbPreambs=[0, 1, 2, 3]
issb=1: rachOccasion=[[[0, 1, 19], 1, 0]], cbPreambs=[0, 1, 2, 3]
issb=2: rachOccasion=[[[0, 1, 19], 2, 0]], cbPreambs=[0, 1, 2, 3]
issb=3: rachOccasion=[[[0, 3, 19], 0, 0]], cbPreambs=[0, 1, 2, 3]
issb=4: rachOccasion=[[[0, 3, 19], 1, 0]], cbPreambs=[0, 1, 2, 3]
issb=5: rachOccasion=[[[0, 3, 19], 2, 0]], cbPreambs=[0, 1, 2, 3]
issb=6: rachOccasion=[[[0, 5, 19], 0, 0]], cbPreambs=[0, 1, 2, 3]
issb=7: rachOccasion=[[[0, 5, 19], 1, 0]], cbPreambs=[0, 1, 2, 3]
selecting prach occasion(=[[0, 1, 19], 0, 0]) with cbPreambs=[0, 1, 2, 3] corresponding to best SSB(with issb=0)
[5GNR SIM]recv PDCCH(DCI 1_0, RA-RNTI)
contents of validCss0Msg2(raRespWin=20 slots):
PDCCH occasion #0: [0, 2, 0, 0]
PDCCH occasion #1: [0, 2, 1, 0]
PDCCH occasion #2: [0, 2, 2, 0]
PDCCH occasion #3: [0, 2, 3, 0]
PDCCH occasion #4: [0, 2, 4, 0]
PDCCH occasion #5: [0, 2, 5, 0]
PDCCH occasion #6: [0, 2, 6, 0]
PDCCH occasion #7: [0, 2, 7, 0]
selecting pdcch candidate: pdcchOccasion=0(numPdcchOccasions=8), pdcchCandidate=0(numPdcchCandidates=2)
[5GNR SIM]recv RAR(Msg2)
---->inside recvMsg2(hsfn=0,sfn=2,dci slot=0)
contents of msg2DmrsSymbs(w.r.t to slivS): [0, 5]
[2019-03-26 14:47:01]Error: When receiving the PDSCH scheduled with SI-RNTI and the system information indicator in DCI is set to 1, RA-RNTI, P-RNTI or TC-RNTI, the UE assumes SS/PBCH block transmission according to ssb-PositionsInBurst, and if the PDSCH resource allocation overlaps with PRBs containing SS/PBCH block transmission resources the UE shall assume that the PRBs containing SS/PBCH block transmission resources are not available for PDSCH in the OFDM symbols where SS/PBCH block is transmitted. tdOverlapped={4, 5, 6, 7, 8, 9, 10, 11, 16, 17} fdOverlapped={456, 457, 458, 459, 460, 461,
爲進一步規避msg2/ssb衝突問題，將'advanced settings'配置爲：
並將DCI 1_0(Msg2)的時域調度從3調整爲10：
此時配置已ok：
output of final valid configurations:
<...omited...>
[5GNR SIM]recv RAR(Msg2)
---->inside recvMsg2(hsfn=0,sfn=2,dci slot=0)
contents of msg2DmrsSymbs(w.r.t to slivS): [0]
[5GNR SIM]Exporting to excel skipped
最終的valid configuration爲：
Valid configuration example:
contents of ["freqBand"]: {'opBand': 'n41', 'duplexMode': 'TDD', 'maxDlFreq': 2690, 'freqRange': 'FR1'}
contents of ["ssbGrid"]: {'scs': '30KHz', 'pattern': 'Case C', 'minGuardBand240k': 'NA', 'kSsb': '0', 'nCrbSsb': '38'}
contents of ["ssbBurst"]: {'maxL': 8, 'inOneGroup': '11111111', 'groupPresence': 'NA', 'period': '20ms'}
contents of ["mib"]: {'sfn': '0', 'hrf': '0', 'dmrsTypeAPos': 'pos2', 'commonScs': '30KHz', 'rmsiCoreset0': '12', 'rmsiCss0': '0', 'coreset0MultiplexingPat': 1, 'coreset0NumRbs': 48, 'coreset0NumSymbs': 1, 'coreset0OffsetList': (16,), 'coreset0Offset': 16, 'coreset0StartRb': 0}
contents of ["carrierGrid"]: {'scs': '30KHz', 'bw': '100MHz', 'numRbs': '273', 'minGuardBand': '3'}
contents of ["pci"]: 0
contents of ["numUeAp"]: 4Tx
contents of ["tddCfg"]: {'refScs': '30KHz', 'pat1Period': '5ms', 'pat1NumDlSlots': '7', 'pat1NumDlSymbs': '6', 'pat1NumUlSymbs': '4', 'pat1NumUlSlots': '2', 'pat2Period': 'not used', 'pat2NumDlSlots': '', 'pat2NumDlSymbs': '', 'pat2NumUlSymbs': '', 'pat2NumUlSlots': ''}
contents of ["css0"]: {'aggLevel': '4', 'numCandidates': 'n4'}
contents of ["dci10Sib1"]: {'rnti': '0xFFFF', 'muPdcch': '1', 'muPdsch': '1', 'tdRa': '10', 'tdMappingType': 'Type B', 'tdK0': '0', 'tdSliv': '26', 'tdStartSymb': '12', 'tdNumSymbs': '2', 'fdRaType': 'RA Type1', 'fdRa': '00001011111', 'fdStartRb': '0', 'fdNumRbs': '48', 'fdVrbPrbMappingType': 'interleaved', 'fdBundleSize': 'n2', 'mcsCw0': '1', 'tbs': '320'}
contents of ["dci10Msg2"]: {'rnti': '0x0001', 'muPdcch': '1', 'muPdsch': '1', 'tdRa': '10', 'tdMappingType': 'Type B', 'tdK0': '0', 'tdSliv': '26', 'tdStartSymb': '12', 'tdNumSymbs': '2', 'fdRaType': 'RA Type1', 'fdRa': '00001011111', 'fdStartRb': '0', 'fdNumRbs': '48', 'fdVrbPrbMappingType': 'interleaved', 'fdBundleSize': 'n2', 'mcsCw0': '1', 'tbScaling': '0', 'tbs': '320'}
contents of ["dmrsSib1"]: {'dmrsType': 'Type 1', 'dmrsAddPos': 'pos0', 'maxLength': 'len1', 'dmrsPorts': '0', 'cdmGroupsWoData': '1', 'numFrontLoadSymbs': '1', 'tdL': [0], 'fdK': [1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0]}
contents of ["dmrsMsg2"]: {'dmrsType': 'Type 1', 'dmrsAddPos': 'pos0', 'maxLength': 'len1', 'dmrsPorts': '0', 'cdmGroupsWoData': '1', 'numFrontLoadSymbs': '1', 'tdL': [0], 'fdK': [1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0]}
contents of ["iniUlBwp"]: {'bwpId': '0', 'scs': '30KHz', 'cp': 'normal', 'locAndBw': '1099', 'startRb': '0', 'numRbs': '273'}
contents of ["rach"]: {'prachConfId': '98', 'raFormat': 'A2', 'raX': 2, 'raY': (1,), 'raSubfNumFr1SlotNumFr2': (9,), 'raStartingSymb': 0, 'raNumSlotsPerSubfFr1Per60KSlotFr2': 1, 'raNumOccasionsPerSlot': 3, 'raDuration': 4, 'scs': '30KHz', 'msg1Fdm': '1', 'msg1FreqStart': '0', 'raRespWin': 'sl20', 'totNumPreambs': '64', 'ssbPerRachOccasion': 'one', 'cbPreambsPerSsb': '4', 'msg3Tp': 'disabled', 'raLen': 139, 'raNumRbs': 12, 'raKBar': 2}
contents of ["advanced"]: {'bestSsb': '0', 'sib1PdcchSlot': '1', 'sib1PdcchCand': '0', 'prachOccasion': '0', 'msg2PdcchSlot': '0', 'msg2PdcchCand': '0'}
（4）ngapp_build20190326下載鏈接：
鏈接: https://pan.baidu.com/s/1A2YD8z_vCtXGMDTSLQD_TQ
提取碼: m4xq