allegro has extra pin


摘自:


https://community.cadence.com/cadence_technology_forums/f/27/t/12273



In reply to salasidis:

Do this all the time in Cadence Capture (was Orcad)

For your parts, on the schematic side: 1) select the part; 2) Edit properties; 3) add a comment called NC; make the value whatever the pin number is. (e.g. for the diode you'd add a comment called NC with the pin 1 as the value.

Note: pins should be separated by commas: 1,2,3,4,5

For the 4 pin IC you'd have NC: 2,3,4,5,6,9,10,11,12,13

Works well, and is easy to set up.

Mitch

I'm a little puzzled to know what is precisely the problem. When you say "one component mounts on a Dip16 footprint, but only has 4 pins (pin 1,8,9,16)" do you mean:

(a) the package has all 16 physical pins but only 4 are used (the other 12 not connected)

(b) the package has the same outline as a DIP16 but has only 4 physical pins (those at the corners)?

If it's (a), you should use the usual DIP16 footprint and add the NC property for the unconnected pins in Capture, as has already been explained by Mitch.

If it's (b), you should edit the footprint in PCB Editor to remove the non-existent pins, save it under a new name, and use this new name for the footprint in Capture. Follow the instructions in algrolibdev, which are clear.(It's easy to make a completely new footprint using the New Symbol Wizard provided that you have identified the padstacks first.)

I have no idea whether pin number have to be sequential from 1 (1, 2, 3, etc); every package that I have ever used has been numbered this way and I never worried about it! It seems an obvious convention to follow.The pin numbers used by the symbol in Capture must match those on the package used in PCB Editor.

Good luck, John

- See more at: https://community.cadence.com/cadence_technology_forums/f/27/t/12273#sthash.PX62nwMi.dpuf
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