Xilinx ISE 出現 Bitgen:342 - This design contains pins which have locations (LOC)...解決辦法

---

當Xilinx ISE出現以下情況時

ERROR:Bitgen:342 - This design contains pins which have locations (LOC) that are
   not user-assigned or I/O Standards (IOSTANDARD) that are not user-assigned. 
   This may cause I/O contention or incompatibility with the board power or
   connectivity affecting performance, signal integrity or in extreme cases
   cause damage to the device or the components to which it is connected.  To
   prevent this error, it is highly suggested to specify all pin locations and
   I/O standards to avoid potential contention or conflicts and allow proper
   bitstream creation.  To demote this error to a warning and allow bitstream
   creation with unspecified I/O location or standards, you may apply the
   following bitgen switch: -g UnconstrainedPins:Allow

最簡單的方法是 右鍵Generate Programming File 點擊Process Properties

右下角選擇Advanced

在Other Bitgen Command Line Options中 填入

-g UnconstrainedPins:Allow

可以發現error變成了warning

另一種錯誤是因爲選擇器件信息設置錯誤，重新設置